Method of fabricating an integrated circuit

ABSTRACT

A method of fabricating an integrated circuit comprising providing a substrate, forming a first layer on the substrate by electrochemical deposition using an electrolyte solution, and converting at least a portion of the first layer into a second layer by electrochemical oxidation using an electrolyte solution, the second layer being an oxide layer.

BACKGROUND

The fabrication of highly integrated electrical circuits (also referredto as simply Integrated Circuits or ICs) with small structuraldimensions is carried out by subjecting a semiconductor substrate disk,also referred to as wafer, to a complex series of different processes.The processes include deposition steps in order to form layers ofdifferent materials on the wafer. Further process steps during whichelectrical structures of integrated circuits are gradually formed on thewafer include removal, patterning and modification steps.

An electrical structure of an integrated circuit may for examplecomprise a stack of layers, the stack including two layers which areseparated from each other by an insulating or dielectric layer. Examplesof such a layer stack include MIM—(Metal-Insulator-Metal),SIS—(Semiconductor-Insulator-Semiconductor),MIS—(Metal-Insulator-Semiconductor), RIR—(Ruthenium-Insulator-Ruthenium)and RIM—(Ruthenium-Insulator-Metal) structures.

Conventional processes carried out to deposit layers on a semiconductorwafer for electrical structures of an integrated circuit includedeposition techniques, for example, CVD (Chemical Vapor Deposition), ALD(Atomic Layer deposition) and PVD (Physical Vapor Deposition). In theseprocesses, the deposition is typically performed in a vacuum orlow-pressure atmosphere, which may be associated with a relatively highcomplexity. Moreover, the formation of layers in structures with a highaspect ratio of depth to width may be challenging using the conventionaldeposition techniques.

SUMMARY

The embodiments described herein relate to methods of fabricating anintegrated circuit.

One embodiment provides a method of fabricating an integrated circuit.In the method, a substrate is provided. A first layer is formed on thesubstrate by electrochemical deposition using an electrolyte solution.At least a portion of the first layer is converted into a second layerby electrochemical oxidation using an electrolyte solution, the secondlayer being an oxide layer.

Another embodiment provides a further method of fabricating anintegrated circuit. In the method, a substrate is provided. A firstlayer is formed on the substrate by electrochemical deposition using anelectrolyte solution. A portion of the first layer is converted byelectrochemical oxidation using an electrolyte solution to provide asecond layer, the second layer being an oxide layer and being located onthe first layer. A third layer is formed on the second layer beingseparated from the first layer by the second layer.

Yet another embodiment provides another method of fabricating anintegrated circuit. In the method, a substrate is provided. A firstlayer is formed on the substrate by electrochemical deposition using anelectrolyte solution. A second layer is formed on the first layer byelectrochemical deposition using an electrolyte solution. The secondlayer is converted into an oxide layer by electrochemical oxidationusing an electrolyte solution.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the presentinvention can be understood in detail, a more particular description ofthe invention, briefly summarized above, may be had by reference toembodiments, some of which are illustrated in the appended drawings. Itis to be noted, however, that the appended drawings illustrate onlytypical embodiments of this invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

FIGS. 1 to 6 illustrate schematic sectional views of a substrate forillustrating steps of a method for fabricating a structural element ofan integrated circuit, according to an embodiment of the invention.

FIG. 7 illustrates a schematic view of a device for carrying out anelectrochemical process using an electrolyte solution, according to anembodiment of the inention.

FIG. 8 illustrates a Pourbaix diagram of aluminium, according to anembodiment of the invention.

FIG. 9 illustrates a schematic view of another device for carrying outan electrochemical process using an electrolyte solution, according toan embodiment of the invention.

FIGS. 10 to 11 illustrate schematic sectional views of a substrate forillustrating steps of a further method for fabricating a structureelement of an integrated circuit, according to an embodiment of theinvention.

FIGS. 12 to 16 illustrate schematic sectional views of a substrate forillustrating steps of a further method for fabricating a structureelement of an integrated circuit, according to an embodiment of theinvention.

FIGS. 17 to 18 illustrate schematic sectional views of a substrate forillustrating steps of a further method for fabricating a structureelement of an integrated circuit, according to an embodiment of theinvention.

FIGS. 19 to 23 illustrate schematic sectional views of a substrate forillustrating steps of a method for fabricating a transistor, accordingto an embodiment of the invention.

FIGS. 24 to 28 illustrate schematic sectional views of a substrate forillustrating steps of another method for fabricating a transistor,according to an embodiment of the invention.

FIG. 29 illustrates a schematic sectional view of a substrate comprisingrecesses, according to an embodiment of the invention.

FIGS. 30 and 31 illustrate the substrate of FIG. 29, wherein layerstacks are formed in the recesses, according to an embodiment of theinvention.

FIG. 32 illustrates a schematic sectional view of a substrate comprisingrecesses, the recesses having an undercut geometry, according to anembodiment of the invention.

FIGS. 33 and 34 illustrate the substrate of FIG. 32, wherein layerstacks are formed in the recesses, according to an embodiment of theinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following, reference is made to embodiments of the invention.However, it should be understood that the invention is not limited tospecific described embodiments. Instead, any combination of thefollowing features and elements, whether related to differentembodiments or not, is contemplated to implement and practice theinvention. Furthermore, in various embodiments the invention providesnumerous advantages over the prior art. However, although embodiments ofthe invention may achieve advantages over other possible solutionsand/or over the prior art, whether or not a particular advantage isachieved by a given embodiment is not limiting of the invention. Thus,the following aspects, features, embodiments and advantages are merelyillustrative and are not considered elements or limitations of theappended claims except where explicitly recited in a claim(s). Likewise,reference to “the invention” shall not be construed as a generalizationof any inventive subject matter disclosed herein and shall not beconsidered to be an element or limitation of the appended claims exceptwhere explicitly recited in a claim(s).

Embodiments described herein relate to the fabrication of a structureelement of an integrated circuit device. The integrated circuit devicemay for example be a control circuit or a memory circuit. Examples forthe latter are DRAM (Dynamic Random Access Memory), PCRAM (Phase ChangeRAM), CBRAM (Conductive Bridging RAM), MRAM (Magneto-resistive RAM) andflash memory devices. The methods generally comprise the formation oflayers and conversion of the same by means of electrochemical processesusing an electrolyte solution. In this connection, the appliedelectrochemical processes may be carried out using an external currentsource, or may be performed in an electroless manner. Theelectrochemical processes may further be carried out at normal pressure,so that layer formation and conversion may be performed with arelatively low complexity.

FIGS. 1 to 6 illustrate schematic sectional views of a substrate 100 forillustrating steps of a method for fabricating a structure element 140of an integrated circuit, according to an embodiment of the invention.The substrate 100, which may include a semiconductor material such ase.g. silicon, may for example be a semiconductor wafer.

As illustrated in FIG. 1, a first layer 110 may be formed on the surfaceof the provided substrate 100. Formation of the layer 110 may be carriedout by electrochemical deposition using a liquid electrolyte solution.For example, in one embodiment, the substrate 100 may be immersed in theelectrolyte solution as described further below. The electrolytesolution may include charged particles or ions, respectively, of thelayer material to be deposited, which may be discharged when depositedat the substrate surface. The particles or ions may for example bepositively charged, and may be reduced in the deposition process by gainof electrons.

As an example, the layer 110 may be a metal layer comprising for exampleAl, in one embodiment. In this case, Al³⁺ ions may be dissolved in theelectrolyte solution and deposited according to the following chemicalreaction

Al³⁺+3e ⁻→Al   (1).

After deposition of the layer 110 on the substrate 100, an upper portionof the layer 110 may be converted into a second layer 120 as depicted inFIG. 2, the second layer 120 being an oxide layer in one embodiment. Inthis context, the term “upper” portion of a layer used herein and in thefollowing relates to a portion of the respective layer adjoining to theexposed or uncovered layer surface. In one embodiment, partiallyoxidizing the layer 110 may be carried out by electrochemical oxidationusing an electrolyte solution. The oxidation process includes the lossof electrons by atoms or molecules of the respective layer material.

In case the layer 110 is an aluminum layer (as described in theabove-mentioned example), the partial oxidation of the layer 110 toprovide the layer 120 may e.g. take place according to the followingchemical reactions

Al→Al³⁺+3e ⁻  (2)

and

2Al³⁺+9H₂O→Al₂O₃+6H₃O⁺  (3).

In one embodiment, an upper portion of the oxide layer 120 may beconverted into a third layer 130, as illustrated in FIG. 3. The thirdlayer 130 is separated from the first layer 110 by the second layer 120.Partially converting the layer 120 to provide the third layer 130 may becarried out by electrochemical reduction using an electrolyte solution.In one embodiment, the third layer 130 may include the same material asthe first layer 110. This may be because the third layer 130 mayoriginate from the initially deposited layer 110, in one embodiment. Thereduction process includes the gain of electrons by the atoms ormolecules of the respective layer material.

In the example where the layer 120 is an aluminum oxide layer (asdescribed in the above-mentioned example), the partial reduction of thelayer 120 to form the layer 130 may e.g. take place according to thefollowing chemical reaction

Al₂O₃+6e ⁻+3H₂O→2Al+6OH⁻  (4).

The layer stack including the three layers 110, 120, 130 located oneupon another on the substrate 100 may subsequently be structured toprovide the structure element 140 as shown in FIG. 4. In one embodiment,a dry etching process may for example be carried out. An example of dryetching is reactive ion etching (RIE). In order to define the lateralstructure of the structure element 140 to be formed, a correspondingarea on the layer 130 may be covered by means of one or more suitablemasking layers (not shown) previous to performing the etching process.The masking layer may for example include a structured photoresist layeror a structured hard mask layer.

Alternatively, as illustrated in FIG. 5, the substrate 100 may beprovided with a structured masking layer 150 before carrying out theelectrochemical deposition of the layer 110. The structured maskinglayer 150 may be a photoresist layer or a hard mask layer. By means ofthe structured masking layer 150, a selective region of the surface ofthe substrate 100 may be exposed. Therefore, by carrying out theelectrochemical processes described above with reference to FIGS. 1 to3, it is possible to selectively deposit the layer 110, and thus tofabricate the structure element 140 only on the surface region of thesubstrate 100 not being covered by the masking layer 150 as shown inFIG. 6.

In one embodiment, the fabricated structure element 140 comprises twometal layers 110, 130 being separated from each other by an oxide layer120. Such a layer stack, which represents a RIR- or MIM-structure, mayfor example be used as a capacitor in an integrated circuit device.Apart from the above specified metal aluminum, other metals like e.g.Cu, Ag, Au, Pd, Pt, Ru, Ni, Cr, Fe, Ti, Ta, Hf, Zr may be considered.

In one embodiment, a semiconductor material like e.g. Si or Ge may beelectrochemically deposited on the substrate 100. In this case, thelayer stack and thus the structure element 140 represents aSIS-structure comprising two semiconductor layers 110, 130 beingseparated from each other by an oxide layer 120.

Apart from deposition of a single material, it is further possible toelectrochemically deposit different materials or metals simultaneously.In this way, the layer 110 (and thus the layer 130) may comprise amixture of different materials or an alloy.

Potential electrolyte solutions which may be used to carry out theelectrochemical deposition and conversion (oxidation, reduction)processes include aqueous electrolyte solutions, organic electrolytesolutions and ionic liquids. An example for an organic electrolytesolution is alcohol. Examples for ionic liquids, which may substantiallycomprise ions, are 1-butyl-1methypyrrolidinium-bis(triflourosulfonyl)amide and1-ethyl-3-methylimidazolium-bis(trifluoromethysulfonyl)amide.

The type of electrolyte solution to be applied may depend on therespective electrochemical process to be carried out, for example, withrespect to a deposition process, the material to be deposited may governthe selection of the electrolyte solution. As an example, an aqueouselectrolyte solution may be used for the electrochemical deposition ofCu, Ag, Au, Pd, Pt, Ru, Ni, Cr and Fe. Materials like for example Ti,Ta, Al, Si, Ge, Hf and Zr may be electrochemically deposited by means ofan organic electrolyte solution or an ionic liquid. In one embodiment,the materials to be deposited may for example be dissolved in therespective electrolyte solutions in the form of salts. Apart from thesematerials, an electrolyte solution may comprise further dissolvedsubstances or agents e.g. originating from salts, by means of which anelectrochemical process may be influenced or controlled, respectively.This may, for example, be the case when carrying out a process in anelectroless manner, as described further below.

The electrochemical deposition and conversion processes, e.g. thesequence of deposition, oxidation and reduction to fabricate the stackof layers 110, 120, 130 depicted in FIG. 3, may each be performed usinga different electrolyte solution. In other words, for each process, thesubstrate 100 may be immersed in a different electrolyte solution. Inone embodiment, the substrate 100 may for example be rinsed (e.g. bymeans of water) in between two immersion steps. Alternatively, it ispossible to perform different electrochemical processes by means of thesame electrolyte solution, i.e. the substrate 100 is immersed in oneelectrolyte solution throughout a number or all electrochemicalprocesses to be carried out in the fabrication of a layer sequence. Thisvariant, which makes it possible to carry out layer deposition andconversion with relatively little time and effort, may be performed bymeans of an external current source. In one embodiment, the differentelectrochemical processes may be controlled, inter alia, by themagnitude and polarity of the applied voltage and current.

FIG. 7 shows a schematic view of a device 160 which may be used to carryout an electrochemical process by applying an external current/voltage,according to an embodiment of the invention. The device 160 may includea tank 162 which is filled with a liquid electrolyte solution 170. Theelectrolyte solution 170 may be an aqueous electrolyte solution, anorganic electrolyte solution, or an ionic liquid. A substrate holder 163is provided in order to hold a substrate 100. By means of the substrateholder 163, the substrate 100 may be held in an upside-down manner, andmay be partially immersed in the electrolyte solution 170, so that thesurface of the substrate 100 (or a layer arranged on the substrate 100)may be subjected to the electrochemical process where the surfacecontacts the electrolyte solution 170 as illustrated in FIG. 7.

The device 160 furthermore comprises a counter-electrode 164 beingarranged in the tank 162, and a current source or power supply 165.Wirings 166, 167 connect the substrate 100 and the counter-electrode 164to the power supply 165. As indicated in FIG. 7, the wiring 166 maycontact the backside of the substrate 100. By means of the power supply165 and the wirings 166, 167, an external voltage or current may beapplied between the substrate 100 and the counter-electrode 164. In thisway an electrical current is generated between the substrate 100 and thecounter-electrode 164, thereby providing or drawing off electrons toevoke the respective electrochemical deposition and/or conversionreactions at the substrate 100 and the layer(s) formed thereon,respectively. Similarly, respective chemical oxidation and reductionreactions may take place at the counter-electrode 164. Deposition of alayer by means of an external power supply 165 is also referred to aselectroplating or electrodeposition.

In order to allow for transfer of electrons through the substrate 100from and to the substrate backside, the substrate 100 may comprise adoped semiconductor material. Alternatively, it is possible to providethe surface of the substrate 100 with a conducting seed layer, whereinthe seed layer is connected to the wiring 166 (not shown). When a hardlyconducting, insulating or oxide layer is present on the surface of thesubstrate, for example the oxide layer 120 depicted in FIGS. 2 and 3,electron transfer may take place through the respective layer by forexample electron tunneling processes.

Parameters like magnitude, polarity and time period of the appliedcurrent and voltage may be used to control and to cause theelectrochemical deposition and conversion processes. As an example, thethicknesses of the individual layers to be formed may be set by means ofthe time period of the applied current/voltage. In one embodiment, thecurrent and voltage may be applied with a constant magnitude.Alternatively, it is possible to apply the current and voltage in aperiodic manner, which in the case of layer deposition is also referredto as pulse plating. Further parameters by means of which theelectrochemical processes may be influenced relate to the composition ofthe electrolyte solution 170, i.e. for example to concentrations ofdissolved substances and, when the electrolyte solution 170 is anaqueous electrolyte solution, to the pH-value.

In case of an aqueous electrolyte solution, process parameters for thecontrol of an electrochemical process (e.g. the magnitude of an externalcurrent/voltage to be applied in order to cause a specific process) maybe determined with the aid of so-called Pourbaix diagrams. Thesediagrams, which may be constructed through the use of thermodynamictheory (the Nernst equation) map out possible stable states of amaterial in an aqueous medium or water, respectively.

FIG. 8 illustrates a Pourbaix diagram 900 for the electrolyte systemaluminium/water, according to an embodiment of the invention. Thediagram 900 indicates the stability regions of pure Al (region 901),Al³⁺ ions (region 902), Al₂O₃ (region 903) and AlO₂ ⁻ ions (region 904)as a function of pH-value and electrochemical potential (reductionpotential with respect to the standard hydrogen electrode) U. Theregions 902 and 904 for the Al³⁺ and AlO₂ ⁻ ions are further illustrateddepending on concentrations of the respective ions, wherein thespecifications 0, −2, −4, −6 represent the logarithm of theconcentration by mol/l. The diagram 900 furthermore illustrates adiagonal dashed line 910 which represents the lower limit of thestability of water. In the region below the dashed line 910, hydrogengas is evolved from hydronium contained in water. In one embodiment, fora pH-value of 7, an oxidation reaction of Al to form Al₂O₃ may be causedat a potential U of greater than approximately −2V. In a potentialregion above −2V, however, additionally formation of hydrogen gasoccurs. Consequently, a potential U of greater than approximately −0.5V(i.e. above the dashed line 910) may be applied in order to only performoxidation of Al without formation of hydrogen gas. In case of arelatively low pH-value of for example 1, formation of Al₂O₃ from Aldoes not occur since Al atoms may only be converted into Al³⁺ ions whichare dissolved in the aqueous electrolyte solution. For relatively highpH-values, Al atoms may convert into AlO₂ ⁻ ions instead of beingoxidized. Similarly, conclusions regarding applicable pH-values andelectrochemical potentials U may be derived with respect toelectrochemical deposition of Al and reduction of Al₂O₃.

In one embodiment, instead of carrying out an electrochemical processlike e.g. a layer deposition process by means of an external currentsource, an electrochemical process may also be performed in anelectroless manner. In case of layer deposition, this process is alsoreferred to as electroless plating. In addition to deposition, reductionand oxidation processes may also be performed in an electroless manner.In case a sequence of different electrochemical processes is to becarried out in an electroless manner, each of the processes may beperformed using a different electrolyte solution.

As an illustration, FIG. 9 shows a schematic view of a device 161 whichmay be used to carry out an electrochemical process in an electrolessmanner. The device 161 may include a tank 162 which is filled with anelectrolyte solution 171. The electrolyte solution 171 may be an aqueouselectrolyte solution, an organic electrolyte solution, or an ionicliquid. The device 161 further comprises a substrate holder 163 by meansof which a substrate 100 may be partially immersed in the electrolytesolution 171, thereby establishing contact of the surface of thesubstrate 100 (or a layer arranged on the substrate 100) to be subjectedto the electrochemical process with the electrolyte solution 171.

In one embodiment, the electrolyte solution 171 may include reactantswhich may provide (reducing agent) or draw off electrons (oxidizingagent) to evoke a respective electrochemical process. The tendency for arespective chemical reaction in an electrolyte solution 171 is given bythe reduction potential of the reactants in the electrolyte solution171. According to the Nernst equation, the reduction potential isdependent on the concentrations of the reactants in the electrolytesolution 171 and, when the electrolyte solution 171 is an aqueouselectrolyte solution, on the pH-value. In other words, an electrolessprocess may be controlled by means of the concentrations of reactants inthe electrolyte solution 171 and, in some cases, the pH value of thesolution 171. A further parameter that controls an electroless processis the time period during which the substrate 100 is subjected to theelectrolyte solution 171.

Examples for a reducing agent (electron donor) include H₃PO₂, H₃PO₃,H₂CO and Mn²⁺. With respect to these substances, donation of electronsmay for example take place according to the following chemical reactions

H₃PO₂+2H₂O→H₃PO₄+4e ⁻+4H⁺  (5),

H₃PO₃+H₂O→H₃PO₄+2e ⁻+2H⁺  (6),

H₂CO+H₂O→HCOOH+2e ⁻+2H⁺  (7),

and

Mn²⁺+2H₂O→MnO₂+4e ⁻+4H⁺  (8).

An example for an oxidizing agent (electron acceptor) is MnO₄ ⁻. Therespective oxidation reaction may e.g. take place according to thefollowing chemical reaction:

MnO₄ ⁻+8H⁺3e ³¹ →Mn⁴⁺+4H₂O   (9).

The chemical reactions (5) to (9) may also take place when carrying outan electrochemical process using an external current source, providedthat the respective reducing or oxidizing agents are dissolved in theapplied electrolyte solution.

With respect to carrying out a deposition process in an electrolessmanner, for example deposition of the layer 110 on the surface of thesubstrate 100 as illustrated in FIG. 1, the surface to be deposited maybe subjected to a surface preparation or treatment before carrying outthe deposition process. In this way it is possible to catalyticallypromote the subsequent layer deposition. An example of a surfacetreatment process is the deposition of an organic layer or seed layer onthe surface to be deposited.

A whole sequence of electrochemical processes—e.g. the sequence ofdeposition, oxidation and reduction to fabricate the stack of layers110, 120, 130 depicted in FIG. 3—may be performed both in an electrolessmanner and by means of providing external current. Moreover, it is alsopossible to perform a sequence of processes in a manner that one orseveral processes are performed using external current, whereas anotherprocess or other processes are performed in an electroless manner. As anexample, deposition of the layer 110 may be carried out in anelectroless manner using a respective electrolyte solution, and thesubsequent oxidation and reduction processes to form the layers 120, 130may be performed by means of an external current source using (a)further electrolyte solution(s).

In the following figures, further methods including electrochemicaldeposition and conversion processes according to embodiments of theinvention are illustrated. For these methods, the above descriptionrelating to details of electrochemical processes, e.g. to materials tobe deposited, possible electrolyte solutions, carrying out processes bymeans of an external current source or in an electroless manner etc. maybe applied as well.

FIGS. 10 and 11 show schematic sectional views of a substrate 100 forillustrating steps of an alternative method for fabricating a structureelement 141 of an integrated circuit, according to an embodiment of theinvention. This method includes steps similar to the method describedwith reference to FIGS. 1 to 6, i.e. a first layer 110 is formed on theprovided substrate 100 (e.g. a semiconductor wafer) by electrochemicaldeposition using an electrolyte solution, and an upper portion of thefirst layer 110 is converted into a second layer 120 by electrochemicaloxidation using an electrolyte solution, the second layer 120 being anoxide layer (see FIGS. 1 and 2). Thereafter, instead ofelectrochemically reducing a portion of the oxide layer 120, a thirdlayer 131 is formed on the second layer 120 by electrochemicaldeposition using an electrolyte solution (FIG. 10).

For example, in one embodiment, the deposition of the first layer 110and formation of the layer 120 may be performed with the sameelectrolyte solution (e.g. by application of a different externalcurrent/voltage), and deposition of the layer 131 may be carried outusing a different electrolyte solution (in an electroless manner orusing an external current source). Deposition of the first layer 110 andformation of the layer 120 may also be performed with differentelectrolyte solutions.

The layer 131 may for example be a metal layer, which is deposited onthe oxide layer 120 according to the following chemical reaction:

Me^(z+)+ze⁻→Me   (10),

wherein Me denotes the metal species, and z the charge of the Me ionsand the number of gained electrons, respectively. In alternativeembodiments, the deposited layer 131 may also be a semiconductor layer.

The stack including the three layers 110, 120, 131 located one uponanother on the substrate 100 may subsequently be structured to providethe structure element 141 as shown in FIG. 11. Depending on thematerials deposited to form the layer 110 and the layer 131, thestructure element 141 may represent a MIM-, RIR-, SIS-, MIS-, orRIM-structure.

Patterning the layers 110, 120, 131 to provide the structure element 141may for example be performed by means of a dry etching process using oneor several masking layers (not shown). Alternatively, the substrate 100may be provided with a structured masking layer 150 before carrying outthe electrochemical deposition of the layer 110, so that fabrication ofthe structure element 141 may selectively take place on the surfaceregion of the substrate 100 not being covered by the masking layer 150.

The following FIGS. 12 to 16 show schematic sectional views of asubstrate 100 for illustrating steps of a further method for fabricatinga structure element 240 of an integrated circuit, according to anembodiment of the invention. The substrate 100 may for example be asemiconductor wafer. As illustrated in FIG. 12, a first layer 210 isformed on the surface of the provided substrate 100 by electrochemicaldeposition using an electrolyte solution. The layer 210 may for examplebe a metal layer or a semiconductor layer.

In one embodiment, the layer 210 may be a titanium layer which isdeposited on the substrate 100 according to the following chemicalreaction

Ti²⁺2e ⁻→Ti   (11).

Thereafter, a second layer 220 may be formed on the first layer 210 byelectrochemical deposition using an electrolyte solution (FIG. 13). Thesecond layer 220 may e.g. be a metal layer or a semiconductor layer, aswell. In one embodiment, the layer 220 may be an aluminium layer whichis deposited on the layer 210 according to the above specified chemicalreaction (1). In one embodiment, formation of the layers 210, 220 may becarried out using different electrolyte solutions.

Subsequently, as shown in FIG. 14, the second layer 220 may be totallyconverted into an oxide layer 221 by electrochemical oxidation using anelectrolyte solution. Conversion of the layer 220 may for example beperformed with the same electrolyte solution used for deposition of thesame (e.g. by application of a different external current/voltage), oralternatively with a different electrolyte solution. In case the layer220 is an aluminum layer (see the above-mentioned example), theoxidation of the layer 220 to provide the (aluminum) oxide layer 221 maytake place according to the above specified chemical reactions (2) and(3).

Subsequently, as shown in FIG. 15, a third layer 230 may be formed onthe oxide layer 221 by electrochemical deposition using an electrolytesolution. The third layer 230 may for example be a metal layer or asemiconductor layer. With respect to a metal layer, the electrochemicaldeposition may take place according to the above specified chemicalreaction (10). In one embodiment, formation of the layer 230 may beperformed using another electrolyte solution which differs from theelectrolyte solution used to convert the layer 220 into the oxide layer221.

The stack including the three layers 210, 221, 230 located one uponanother on the substrate 100 may subsequently be structured to providethe structure element 240 as shown in FIG. 16. The structure element 240may represent a MIM-, RIR-, SIS-, MIS-, or RIM-structure, depending onthe materials deposited to form the layer 210 and the layer 230.

Structuring the stack of layers 210, 221, 230 to provide the structureelement 240 may for example be performed by means of a dry etchingprocess. Alternatively, the substrate 100 may be provided with astructured masking layer 150 before carrying out the electrochemicaldeposition of the layer 210, so that fabrication of the structureelement 240 may selectively take place on the surface region of thesubstrate 100 not being covered by the masking layer 150.

The following FIGS. 17 and 18 show schematic sectional views of asubstrate 100 for illustrating steps of an alternative method forfabricating a structure element 241 of an integrated circuit, accordingto an embodiment of the invention. This method includes steps similar tothe method described with reference to FIGS. 12 to 16, i.e.electrochemical deposition of a first layer 210 on the providedsubstrate 100, electrochemical deposition of a second layer 220 on thefirst layer 210, and electrochemical conversion of the complete layer220 into an oxide layer 221 (see FIGS. 12 to 14).

Thereafter, an upper portion of the oxide layer 221 may be convertedinto a third layer 222 by electrochemical reduction using an electrolytesolution as illustrated in FIG. 17. The layer 222 may include the samematerial as the originally formed layer 220 (FIG. 13). In oneembodiment, formation of the layer 222 by electrochemical reduction maybe performed with the same electrolyte solution used for oxidation ofthe layer 220 to form the oxide layer 221 (e.g. by application of adifferent external current/voltage), or with a different electrolytesolution. In case the layer 221 is an aluminium oxide layer (cf. theabove-mentioned example), the partial reduction of the layer 221 to formthe layer 222 may take place according to the above specified chemicalreaction (4).

The stack including the three layers 210, 221, 222 located one uponanother on the substrate 100 may subsequently be structured to providethe structure element 241 as shown in FIG. 16. The structure element 241may again represent a MIM-, RIR-, SIS-, MIS-, or RIM-structure,depending on the materials deposited to form the layer 210 and the layer220. With respect to details regarding patterning of the layers 210,221, 222, or providing a structured masking layer 150 previous toformation of the layer 210, reference is made to the precedingdescription.

The following FIGS. 19 to 23 show schematic sectional views of asubstrate 100 for illustrating steps of a further method comprisingelectrochemical processes, according to an embodiment of the invention.The method may be applied to fabricate a structure element 340, whichmay serve as gate stack of a field effect transistor (FET) 350.

As illustrated in FIG. 19, a layer 310 may be formed on a surface of theprovided substrate 100 (e.g. a semiconductor wafer) by electrochemicaldeposition using an electrolyte solution. The layer 310 may for examplebe a metal layer. Afterwards, the layer 310 is totally converted into anoxide layer 311 by electrochemical oxidation using an electrolytesolution (FIG. 20). Conversion of the layer 310 into the oxide layer 311may be performed with the same electrolyte solution used for depositionof the same (e.g. by application of a different externalcurrent/voltage), or with a different electrolyte solution.

Subsequently, an upper portion of the oxide layer 311 may be convertedinto a layer 312 by electrochemical reduction using an electrolytesolution (FIG. 21). The layer 312 may include the same material as theinitially deposited layer 310. In one embodiment, formation of the layer312 by electrochemical reduction may be performed with the sameelectrolyte solution used for oxidation of the layer 310 to form theoxide layer 311 (e.g. by application of a different externalcurrent/voltage), or with a different electrolyte solution.

The stack including the oxide layer 311 located on the substrate 100 andthe layer 312 located on the oxide layer 311 may subsequently bestructured to provide the structure element 340 (FIG. 22). Structuringmay e.g. be performed by means of a dry etching process using one orseveral masking layers (not shown). Alternatively, the substrate 100 maybe provided with a structured masking layer 150 previous to formation ofthe layer 310, so that fabrication of the structure element 340 mayselectively be performed on the surface region of the substrate 100 notbeing covered by the masking layer 150.

The fabricated structure element 340 may for example be used as acapacitor, wherein the electrodes of the capacitor are formed by thelayer 312 and the substrate region of the substrate 100 underneath theoxide layer 311. When the substrate 100 is a semiconductor substrate,the substrate region adjoining to the oxide layer 311 may for examplecomprise a doped semiconductor material (not depicted).

The structure element 340 may alternatively be used as gate stack of atransistor 350, wherein the layer 312 acts as gate electrode and thelayer 311 as gate dielectric. As illustrated in FIG. 23, further methodsteps may be carried out for completion of the transistor 350. Thisincludes formation of two doped regions 355 being separated from eachother in the substrate 100 in a region below the layer stack 340. Thetwo doped regions 355 may constitute source and drain of the transistor350. The formation of the doped regions 355 may include carrying out oneor several ion implantation processes in order to introducecorresponding dopants into the substrate 100. In order to implant thedopants at a distance with regard to the gate stack 340, spacers 360 maybe formed at the sidewalls of the gate stack 340 prior to carrying outthe ion implant(s), as indicated in FIG. 23.

The following FIGS. 24 to 28 show schematic sectional views of asubstrate 100 for illustrating steps of a further method comprisingelectrochemical processes. The method may be applied to fabricate astructure element 440, which may serve as gate stack of a field effecttransistor 450.

As illustrated in FIG. 24, a layer 410 may be formed on a surface of theprovided substrate 100 (e.g. a semiconductor wafer) by electrochemicaldeposition using an electrolyte solution. The layer 410 may for examplebe a metal layer or a semiconductor layer. Afterwards, the layer 410 maybe totally converted into an oxide layer 411 by electrochemicaloxidation using an electrolyte solution (FIG. 25). In one embodiment,conversion of the layer 410 into the oxide layer 411 may be performedwith the same electrolyte solution used for deposition of the same (e.g.by application of a different external current/voltage), or with adifferent electrolyte solution.

Subsequently, a further layer 420 may be formed on the oxide layer 411by electrochemical deposition using an electrolyte solution (FIG. 26).The layer 420 may for example be a metal layer. In one embodiment theelectrolyte solution applied in the deposition of the layer 420 may be adifferent one compared to the electrolyte solution(s) applied in thepreceding electrochemical processes.

The stack including the oxide layer 411 located on the substrate 100 andthe layer 420 located on the oxide layer 411 may subsequently bestructured to provide the structure element 440 (FIG. 27). This step maye.g. be performed by means of a dry etching process. Alternatively, thesubstrate 100 may be provided with a structured masking layer 150previous to formation of the layer 410, so that fabrication of thestructure element 440 may selectively be performed on the surface regionof the substrate 100 not being covered by the masking layer 150.

The fabricated structure element 440 may be used as e.g. a capacitor,wherein the electrodes of the capacitor are formed by the layer 420 andthe substrate region of the substrate 100 underneath the oxide layer411. The structure element 440 may alternatively be used as gate stackof a transistor 450, wherein the layer 420 acts as gate electrode andthe layer 411 as gate dielectric. As illustrated in FIG. 28, furthermethod steps may be carried out for completion of the transistor 450,including formation of two doped regions 455 for source and drain of thetransistor 450 by means of one or several ion implantation processes.Spacers 460 may additionally be formed at the sidewalls of the gatestack 440 previous to carrying out the ion implant(s).

The application of electrochemical processes using liquid electrolytesolutions makes it possible to reliably form and convert layers on asubstrate surface having a more complex geometry compared to a planarsurface. By way of illustration, FIG. 29 shows a substrate 500 (e.g. asemiconductor wafer) having a number of recesses or trenches 505. Thetrenches 505 comprise a relatively high aspect ratio of depth to width,which is more than 2.

FIG. 30 depicts the substrate 500 after formation of layers 510, 520 inthe trenches 505. As an example, the layer 510 may be an oxide layer,and the layer 520 may be a metal layer in order to provide trenchcapacitors. The electrodes of the trench capacitors are formed by thelayer 520 and the substrate material of the substrate 500 adjoining tothe oxide layer 510. In one embodiment, the substrate region adjoiningto the oxide layer 510 may for example comprise a doped semiconductormaterial (not depicted). Formation of the layers 510, 520 may forexample include electrochemical method steps similar to the processesdepicted in FIGS. 19 to 21 (i.e. layer deposition, total oxidation ofthe deposited layer, and partial reduction of an upper portion of theoxidized layer) or the processes depicted in FIGS. 24 to 26 (i.e.deposition of a layer, total oxidation of the deposited layer, anddeposition of a further layer).

In order to form the layers 510, 520 only in the trenches 505, arespective masking layer may be applied on the substrate 500 outside ofthe trenches 505 before layer formation (not depicted). Alternatively,it is for example possible to carry out a polishing process like CMP(Chemical Mechanical Polishing) after formation of the layers 510, 520in order to remove the layers 510, 520 outside of the trenches 505.

The trenches 505 may additionally be completely filled up with aninsulating material 530, for example poly silicon, as indicated in FIG.30. The insulating material 530 may be formed by means ofelectrochemical deposition using an electrolyte solution, as well.Alternatively, it is possible to completely fill up the remaining voidof the recesses 505 with the layer 520 (not shown).

FIG. 31 depicts the substrate 500 after formation of layers 610, 620,630 in the trenches 505. As an example, the layers 610, 630 may be metallayers, and the layer 620 may be an oxide layer in order to providetrench capacitors. Formation of the layers 610, 620, 630 may for exampleinclude electrochemical method steps similar to the processesillustrated with respect to FIGS. 1 to 3 (i.e. layer deposition—partialoxidation of an upper portion of the deposited layer—partial reductionof an upper portion of the oxidized layer), the processes illustratedwith respect to FIG. 10 (i.e. layer deposition—partial oxidation of anupper portion of the deposited layer—deposition of a further layer), theprocesses illustrated with respect to FIGS. 12 to 15 (i.e. deposition ofa layer—deposition of a further layer—total oxidation of the depositedfurther layer—deposition of yet another layer) or the processesillustrated with respect to FIG. 17 (i.e. deposition of alayer—deposition of a further layer—total oxidation of the depositedfurther layer—partial reduction of an upper portion of the oxidizedfurther layer).

In order to form the layers 610, 620, 630 only in the trenches 505, amasking layer may be applied on the substrate 500 outside of thetrenches 505 before layer formation, or a polishing process may beperformed after layer formation. The trenches 505 may additionally becompletely filled up with an insulating material 640, for example polysilicon, as indicated in FIG. 31. Alternatively, it is possible tocompletely fill up the remaining void of the recesses 505 with the layer630 (not shown).

FIG. 32 shows another example of a substrate 700 (e.g. a semiconductorwafer) with a number of trenches 705, according to an embodiment of theinvention. The trenches 705 again have a relatively high aspect ratio ofdepth to width (of greater than 2) and additionally comprise an undercutgeometry including an upper trench section 706 and a lower trenchsection 707, the lower trench section 707 being wider than the uppertrench section 706. A reliable formation of layers on the substrate 700in the trenches 705 and conversion of the same is again made possible bymeans of electrochemical processes using liquid electrolyte solutions.

FIG. 33 depicts the substrate 700 after electrochemical formation oflayers 710, 720 in the trenches 705, according to an embodiment of theinvention. As an example, the layer 710 may be an oxide layer, and thelayer 720 may be a metal layer in order to provide trench capacitors.The electrodes of the trench capacitors may be formed by the layer 720and the substrate material adjoining to the oxide layer 710. Formationof the layers 710, 720 may be carried out by means of electrochemicalprocesses similar to formation of the layers 510, 520 in the trenches505 depicted in FIG. 30.

FIG. 34 depicts the substrate 700 after electrochemical formation oflayers 810, 820, 830 in the trenches 705. In one embodiment, the layers810, 830 may be metal layers, and the layer 820 may be an oxide layer inorder to provide trench capacitors. Formation of the layers 810, 820,830 may be carried out by means of electrochemical processes similar toformation of the layers 610, 620, 630 in the trenches 505 depicted inFIG. 31.

The embodiments described with reference to the figures are examples andtherefore not to be considered limiting. Further embodiments may berealized which comprise further modifications and variations of thedescribed methods and integrated circuit devices. Instead of thematerials indicated for layer deposition, other materials may be used.The same applies to the choice of electrolyte solutions.

Moreover, electrochemical deposition and conversion processes may becarried out using devices other than the devices 160, 161 illustrated inFIGS. 7 and 9. As an example, instead of partially immersing a substratein an electrolyte solution, a substrate may be totally immersed in anelectrolyte solution by means of a substrate holder. In this case, thesubstrate may additionally be provided with a sealing or encapsulationexcept for a region of the substrate surface to be subjected to anelectrochemical process.

The methods may comprise further method steps than those described.These steps may for example relate to the fabrication of furthercomponents of an integrated circuit device. It is also possible to carryout e.g. an additional ion implanting process, thereby enhancing theelectrical conductivity of a formed semiconductor layer. As an example,the layer 312 of the layer stack 340 depicted in FIG. 22 may be asemiconductor layer instead of a metal layer, and subjected to an ionimplant after formation for this purpose.

The preceding description describes embodiments of the invention. Thefeatures disclosed therein and the claims and the drawings can,therefore, be useful for realizing the invention in its variousembodiments, both individually and in any combination. While theforegoing is directed to embodiments of the invention, other and furtherembodiments of this invention may be devised without departing from thebasic scope of the invention, the scope of the present invention beingdetermined by the claims that follow.

1. A method of fabricating an integrated circuit, comprising: providinga substrate; forming a first layer on the substrate by electrochemicaldeposition using a first electrolyte solution; and converting at least aportion of the first layer into a second layer by electrochemicaloxidation using a second electrolyte solution, the second layer being anoxide layer.
 2. The method according to claim 1, further comprising:converting a portion of the second layer into a third layer byelectrochemical reduction using a third electrolyte solution, the thirdlayer comprising the same material as the first layer.
 3. The methodaccording to claim 1, further comprising: forming a third layer on thesecond layer by electrochemical deposition using a third electrolytesolution.
 4. The method according to claim 1, wherein providing thesubstrate comprises forming a fourth layer on the substrate byelectrochemical deposition using a fourth electrolyte solution, andwherein the first layer is formed on the fourth layer on the substrate.5. The method according to claim 1, wherein at least one of forming thefirst layer and converting at least a portion of the first layer iscarried out using an external current source coupled to the substrateand a counter-electrode.
 6. The method according to claim 1, wherein atleast one of forming the first layer and converting at least a portionof the first layer is carried out in an electroless manner.
 7. Themethod according to claim 1, wherein forming the first layer andconverting at least a portion of the first layer is carried out usingthe same electrolyte solution.
 8. The method according to claim 1,wherein the first electrolyte solution is an aqueous electrolytesolution.
 9. The method according to claim 1, wherein the firstelectrolyte solution is an organic electrolyte solution.
 10. The methodaccording to claim 1, wherein the first electrolyte solution is an ionicliquid.
 11. The method according to claim 1, wherein the secondelectrolyte solution is an aqueous electrolyte solution.
 12. The methodaccording to claim 1, wherein the second electrolyte solution is anorganic electrolyte solution.
 13. The method according to claim 1,wherein the second electrolyte solution is an ionic liquid.
 14. Themethod according to claim 1, wherein the first layer is a metal layer.15. The method according to claim 1, wherein the first layer is asemiconductor layer.
 16. The method according to claim 1, wherein thefirst layer comprises any one of the following materials: Cu, Ag, Au,Pd, Pt, Ru, Ni, Cr, Fe, Ti, Ta, Al, Si, Ge, Hf. Zr.
 17. The methodaccording to claim 1, wherein the substrate comprises at least onerecess, and wherein the first layer is formed on the substrate in the atleast one recess.
 18. The method according to claim 17, wherein therecess comprises an aspect ratio of depth to width that is greater than2.
 19. A method of fabricating an integrated circuit comprising:providing a substrate; forming a first layer on the substrate byelectrochemical deposition using a first electrolyte solution;converting a portion of the first layer by electrochemical oxidationusing a second electrolyte solution to provide a second layer, thesecond layer being an oxide layer formed on the first layer; and forminga third layer on the second layer, the third layer being separated fromthe first layer by the second layer.
 20. The method according to claim19, wherein forming the third layer comprises converting a portion ofthe second layer by electrochemical reduction using a third electrolytesolution, the third layer comprising the same material as the firstlayer.
 21. The method according to claim 20, wherein forming the firstlayer, converting a portion of the first layer and converting a portionof the second layer is carried out using the same electrolyte solution.22. The method according to claim 19, wherein the third layer is formedon the second layer by electrochemical deposition using a thirdelectrolyte solution.
 23. A method of fabricating an integrated circuitcomprising: providing a substrate; forming a first layer on thesubstrate by electrochemical deposition using a first electrolytesolution; forming a second layer on the first layer by electrochemicaldeposition using a second electrolyte solution; and converting thesecond layer into an oxide layer by electrochemical oxidation using athird electrolyte solution.
 24. The method according to claim 23 furthercomprising: forming a third layer on the second layer by electrochemicaldeposition using a fourth electrolyte solution.
 25. The method accordingto claim 23 further comprising: forming a third layer on the secondlayer by converting a portion of the second layer by electrochemicalreduction using a fourth electrolyte solution.